The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Feb. 10, 2023
Applicant:

Marvell Israel (M.i.s.l) Ltd., Yokneam, IL;

Inventors:

Dan Azeroual, Kiriat Ata, IL;

Liav Ben Artsi, Nahariya, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/10 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 25/105 (2013.01); H01L 24/72 (2013.01); H01L 24/90 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1094 (2013.01);
Abstract

A printed circuit board (PCB) system includes an integrated circuit (IC) package having a main IC chip that is electrically coupled to a top surface of a package substrate. A first printed circuit board (PCB) is electrically coupled to first contact structures on a bottom surface of the package substrate. A heat dissipation member is coupled to the main IC chip. A memory module is configured to electrically couple, via an interposer, with second contact structures on a top surface of the package substrate while the heat dissipation member dissipates heat from the main IC chip away from one or more memory IC chips on the memory module. The interposer is configured to electrically couple the second contact structures of the IC package with the memory module while the heat dissipation member dissipates heat from the main IC chip away from the one or more memory IC chips.


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