The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Dec. 09, 2022
Applicants:

Inventec (Pudong) Technology Corporation, Shanghai, CN;

Inventec Corporation, Taipei, TW;

Inventors:

Yuan Sang, Shanghai, CN;

Xiao-Xiao Mao, Shanghai, CN;

Jin-Dong Zhao, Shanghai, CN;

Assignees:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318597 (2013.01); G01R 31/31855 (2013.01); G01R 31/318555 (2013.01); G01R 31/318572 (2013.01);
Abstract

A dummy dual in-line memory module (DIMM) testing system based on boundary scan interconnect and a method thereof. A dummy dual in-line memory module functioning normally is used as a test fixture, a dummy dual in-line memory module under test is served as an unit under test (UUT), and the test fixture and the unit under test are inserted into a test device to electrically connect to each other, so that the test access port (TAP) device can perform boundary scan to control the test fixture to test the unit under test through signal pins, and check a test result based on a data signal collected from at least one boundary scan register. Therefore, the effect of improving testing convenience of the dummy DIMM can be achieved.


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