The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2024
Filed:
May. 25, 2021
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Inventors:
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 63/00 (2023.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/10 (2023.01); H10N 50/80 (2023.01); H10N 50/85 (2023.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10B 63/24 (2023.02); H10B 61/10 (2023.02); H10B 63/80 (2023.02); H10N 50/01 (2023.02); H10N 50/10 (2023.02); H10N 50/80 (2023.02); H10N 70/021 (2023.02); H10N 70/063 (2023.02); H10N 70/231 (2023.02); H10N 70/24 (2023.02); H10N 70/245 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02); H10N 50/85 (2023.02); H10N 70/8825 (2023.02); H10N 70/8833 (2023.02); H10N 70/8845 (2023.02);
Abstract
A memory includes: a dielectric fin formed over a substrate; and a pair of memory cells disposed along respective sidewalls of the dielectric fin, each of the pair of memory cells comprising: a first conductor layer; a selector layer; a resistive material layer; and a second conductor layer, wherein the first conductor layer, selector layer, resistive material layer, and second conductor layer each includes upper and lower boundaries, and at least one of the upper and lower boundaries is tilted away from one of the sidewalls of the dielectric fin by an angle.