The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2024
Filed:
Apr. 21, 2021
Applicant:
Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;
Inventors:
Assignee:
Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/1157 (2017.01); G11C 16/04 (2006.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
H10B 43/35 (2023.02); G11C 16/0466 (2013.01); G11C 16/0483 (2013.01); H10B 43/27 (2023.02); H10B 43/40 (2023.02); G11C 16/10 (2013.01); G11C 16/26 (2013.01);
Abstract
A highly integrated semiconductor device is provided. The semiconductor device includes a substrate, a prism-like insulator, a memory cell string including a plurality of transistors connected in series. The prism-like insulator is provided over the substrate. The memory cell string is provided on the side surface of the prism-like insulator. The plurality of transistors each include a gate insulator and a gate electrode. The gate insulator includes a first insulator, a second insulator, and a charge accumulation layer. The charge accumulation layer is positioned between the first insulator and the second insulator.