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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11963291 B1

PDFFull Text
Date of Patent:
Apr. 16, 2024

Filed:

Apr. 21, 2022

Efficient wave guide transition between package and pcb using solder wall

Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Leo van Gemert, Nijmegen, NL;

Michael B. Vincent, Chandler, AZ (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:

Sherman Ng

Int. Cl.
CPC ...
H05K 1/02 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/66 (2006.01); H01P 3/12 (2006.01); H05K 1/11 (2006.01); H05K 3/10 (2006.01); H05K 3/34 (2006.01); H05K 3/40 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0243 (2013.01); H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 23/3157 (2013.01); H01L 23/49838 (2013.01); H01L 23/66 (2013.01); H01L 24/16 (2013.01); H01P 3/121 (2013.01); H05K 1/0218 (2013.01); H05K 1/111 (2013.01); H05K 3/10 (2013.01); H05K 3/3426 (2013.01); H05K 3/4007 (2013.01); H01L 2223/6627 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/1903 (2013.01); H05K 2201/10734 (2013.01);
Abstract

A packaging assembly and methodology provide a PCB substrate with one or more waveguide apertures and a conductive pattern which includes a plurality of landing pads that are disposed around peripheral edges of each waveguide aperture and that are connected to one another by trace lines so that, upon attachment and reflow of solder balls to the plurality of landing pads, the solder balls reflow along the trace lines to form a fully closed solder waveguide shielding wall disposed around peripheral edges of the first waveguide aperture.

Find Patent Forward Citations

van Gemert, Leo. (2024). Efficient wave guide transition between package and pcb using solder wall (U.S. Patent No. 11963291). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11963291

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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