The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2024

Filed:

Jul. 20, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Nir Weisman, Hod Hasharon M, IL;

Omer Asaf, Oranit M, IL;

Eyal Goldberger, Moshav Beherotaim M, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 7/00 (2006.01); H01L 23/552 (2006.01); H01L 23/66 (2006.01); H01Q 1/22 (2006.01); H01Q 5/371 (2015.01); H01Q 21/06 (2006.01); H01Q 25/00 (2006.01);
U.S. Cl.
CPC ...
H01Q 7/00 (2013.01); H01L 23/552 (2013.01); H01L 23/66 (2013.01); H01Q 1/2283 (2013.01); H01Q 5/371 (2015.01); H01Q 21/06 (2013.01); H01Q 25/001 (2013.01); H01L 2223/6677 (2013.01);
Abstract

Aspects of the embodiments are directed to an on-chip loop antenna and methods of manufacturing the same. In some embodiments, the on-chip loop antenna is in an integrated circuit (IC) die. The IC die comprises metal loops substantially centered around a core region of the IC die in a metallization stack of the IC die, a dielectric between spaces of the metal loops, an electric circuit in the core region electrically connected to the metal loops with an interconnect, and a ground plane in the metallization stack electrically connected to the loops with a first plurality of vias and to the electric circuit with a second plurality of vias. The first plurality of vias is different from the second plurality of vias, and the electric circuit includes an inductor. In some embodiments, the on-chip loop antenna can be carried by a semiconductor package.


Find Patent Forward Citations

Loading…