The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2024

Filed:

Sep. 28, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Shuangshuang Wu, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 28/91 (2013.01); H10B 12/00 (2023.02); H10B 12/033 (2023.02); H10B 12/09 (2023.02);
Abstract

A semiconductor structure and a method for manufacturing the semiconductor structure are provided. The method for manufacturing the semiconductor structure includes: providing a substrate, in which the substrate includes an array area and a peripheral area adjacent to each other, and the array area includes a buffer area connected to the peripheral area; forming a first dielectric layer, a first supporting layer, a second dielectric layer, a second supporting layer and a third dielectric layer, which are successively stacked onto one another, on the substrate, forming a groove-type lower electrode, which at least penetrates through the third dielectric layer and the second supporting layer, in the buffer area; removing the third dielectric layer through a wet etching process; and etching the second supporting layer in the peripheral area after removing the third dielectric layer.


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Wu, Shuangshuang. (2024). Semiconductor structure and method for manufacturing semiconductor structure (U.S. Patent No. 11955511). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11955511

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