The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2024
Filed:
Aug. 30, 2021
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventor:
Anhao Cheng, Hsinchu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5223 (2013.01); H01L 21/76828 (2013.01); H01L 21/823475 (2013.01); H01L 23/53295 (2013.01); H01L 21/76802 (2013.01); H01L 21/76832 (2013.01); H01L 21/76877 (2013.01); H01L 23/53228 (2013.01);
Abstract
An integrated circuit includes a plurality of transistors and an interlevel dielectric layer formed over the transistors. The interlevel dielectric layer includes a first region and a second region with a higher dielectric constant than the first region. The difference in dielectric constant is produced by curing the first region shielding the second region from the curing. Metal signal lines are formed in the first region. Metal-on-metal capacitors are formed in the second region.