The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2024

Filed:

Oct. 03, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Theodore T. Pekny, San Jose, CA (US);

Jae-Kwan Park, Cupertino, CA (US);

Violante Moschiano, Avezzano, IT;

Michele Incarnati, Gioia dei Maris, IT;

Luca de Santis, Avezzano, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G11C 7/22 (2006.01); G11C 16/26 (2006.01); G11C 16/32 (2006.01);
U.S. Cl.
CPC ...
G11C 7/22 (2013.01); G11C 16/26 (2013.01); G11C 16/32 (2013.01); G11C 2207/2209 (2013.01);
Abstract

Apparatuses and methods for performing concurrent memory access operations for different memory planes are disclosed herein. An example apparatus may include a memory array having a plurality of memory planes. Each of the plurality of memory planes comprises a plurality of memory cells. The apparatus may further include a controller configured to receive a group of memory command and address pairs. Each memory command and address pair of the group of memory command and address pairs may be associated with a respective memory plane of the plurality of memory planes. The internal controller may be configured to concurrently perform memory access operations associated with each memory command and address pair of the group of memory command and address pairs regardless of page types associated with the pairs of the group (e.g., even if two or more of the memory command and address pairs may be associated with different page types).


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