The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2024

Filed:

Dec. 22, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Daniel J. Ragland, Sherwood, OR (US);

Guy M. Therien, Sherwood, OR (US);

Ankush Varma, Portland, OR (US);

Eric J. DeHaemer, Shrewsbury, MA (US);

David T. Mayo, Boxborough, MA (US);

Ariel Gur, Atlit, IL;

Yoav Ben-Raphael, Haifa, IL;

Mark P. Seconi, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 1/28 (2006.01); G06F 1/3203 (2019.01); G06F 1/324 (2019.01); G06F 9/52 (2006.01); G06F 13/20 (2006.01); G06F 1/3287 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3203 (2013.01); G06F 1/28 (2013.01); G06F 1/324 (2013.01); G06F 9/5044 (2013.01); G06F 9/5094 (2013.01); G06F 9/52 (2013.01); G06F 13/20 (2013.01); G06F 1/3287 (2013.01); G06F 1/3296 (2013.01);
Abstract

In one embodiment, a processor includes: a plurality of cores each comprising a multi-threaded core to concurrently execute a plurality of threads; and a control circuit to concurrently enable at least one of the plurality of cores to operate in a single-threaded mode and at least one other of the plurality of cores to operate in a multi-threaded mode. Other embodiments are described and claimed.


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