The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2024

Filed:

Nov. 05, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Seunghyun Baik, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 24/73 (2013.01); H01L 24/33 (2013.01); H01L 24/45 (2013.01); H01L 2224/05541 (2013.01); H01L 2224/05553 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/0569 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/06051 (2013.01); H01L 2224/06165 (2013.01); H01L 2224/06515 (2013.01); H01L 2224/32013 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48101 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48132 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/49111 (2013.01); H01L 2224/49175 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73265 (2013.01);
Abstract

A semiconductor package according to the exemplary embodiments of the disclosure includes a base substrate including a base bonding pad, a first semiconductor chip disposed on the base substrate, a first adhesive layer provided under the first semiconductor chip, a first bonding pad provided in a bonding region on an upper surface of the first semiconductor chip, a first bonding wire interconnecting the base bonding pad and the first bonding pad, and a crack preventer provided in a first region at the upper surface of the first semiconductor chip. The crack preventer includes dummy pads provided at opposite sides of the first region and a dummy wire interconnecting the dummy pads.


Find Patent Forward Citations

Loading…