Measuring a timing margin of a memory device using an internal oscilloscope

Abstract

A known randomized data pattern at a predetermined reference voltage of the internal oscilloscope is inputted to an internal oscilloscope of the receiving device for each delay tap element of a plurality of consecutive delay tap elements applied to a system clock of a receiving device. A first delay tap element among the plurality of consecutive delay tap elements in which an output of the internal oscilloscope matches the known randomized data pattern is identified. Responsive to identifying the first delay tap element, a last delay tap element among the plurality of consecutive delay tap elements in which the output of the internal oscilloscope matches the known randomized data pattern is identified.