The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2024

Filed:

Apr. 17, 2023
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Liang Han, Shanghai, CN;

Hai Ying Wang, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/30 (2023.01); H01L 29/49 (2006.01); H10B 41/60 (2023.01);
U.S. Cl.
CPC ...
H10B 41/30 (2023.02); H01L 29/4933 (2013.01); H10B 41/60 (2023.02);
Abstract

A memory structure is provided in the present disclosure. The memory structure includes a substrate, a plurality of discrete memory gate structures on the substrate where each of the plurality of memory gate structures includes a floating gate layer and a control gate layer on the floating gate layer, an isolation layer formed between adjacent memory gate structures where a top surface of the isolation layer is lower than a top surface of the control gate layer and higher than a bottom surface of the control gate layer, an opening is formed on an exposed sidewall of the control gate layer, and a bottom of the opening is lower than or coplanar with the top surface of the isolation layer, and a metal silicide layer on an exposed surface of the control gate layer and the top surface of the isolation layer.


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