The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2024

Filed:

Jun. 06, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ruilong Xie, Niskayuna, NY (US);

Jing Guo, Niskayuna, NY (US);

Ekmini Anuja De Silva, Slingerlands, NY (US);

Abraham Arceo de la Pena, Albany, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/41 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 29/41775 (2013.01); H01L 29/401 (2013.01); H01L 29/413 (2013.01);
Abstract

Techniques for selective CD shrink for source and drain contact trench to optimize FET device performance are provided. In one aspect, a semiconductor FET device includes: at least one gate; source and drains on opposite sides of the at least one gate; recesses in the source and drains; and metal contacts disposed over the source and drains and in the recesses, wherein the metal contacts are in direct contact with a bottom and sidewalls of each of the recesses in both a first direction and a second direction, wherein the first direction is perpendicular to the at least one gate, and wherein the second direction is parallel to the at least one gate. A method of forming a semiconductor FET device is also provided.


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