The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2024

Filed:

Sep. 19, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Kai Tian, Hefei, CN;

Yuxia Wang, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/156 (2006.01); G01R 31/317 (2006.01); G11C 7/22 (2006.01); G11C 29/02 (2006.01); H03K 5/135 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G01R 31/31727 (2013.01); G11C 29/023 (2013.01); H03K 5/135 (2013.01); H03K 5/1565 (2013.01);
Abstract

A calibration circuit includes: a differential input circuit, configured to receive first and second oscillation signals, the first and second oscillation signals having the same frequency and opposite phases, duty cycle of the first oscillation signal and duty cycle of the second oscillation signal being in a first preset range, and the differential input circuit being configured to output first and internal signals; a comparison unit, connected to an output end of the differential input circuit and configured to compare duty cycle of the first internal signal and/or duty cycle of the second internal signal; and a logical unit, connected to the comparison unit and the differential input circuit, and configured to control the differential input circuit according to an output result of the comparison unit, such that the duty cycle of the first internal signal and/or the duty cycle of the second internal signal reaches a second preset range.


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