The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2024

Filed:

Jun. 16, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Min-Ying Tsai, Kaohsiung, TW;

Cheng-Ta Wu, Shueishang Township, TW;

Yeur-Luen Tu, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14634 (2013.01); H01L 21/7684 (2013.01); H01L 23/481 (2013.01); H01L 27/14636 (2013.01); H01L 27/1469 (2013.01);
Abstract

Various embodiments of the present disclosure are directed towards a method for forming an integrated chip, the method includes forming a through substrate via (TSV) in a first substrate. The TSV continuously extends from a first surface of the first substrate to a second surface of the first substrate. A conductive contact is formed on the second surface of the first substrate. The conductive contact comprises a first conductive layer disposed on the TSV. An upper conductive layer is formed between the conductive contact and the TSV. The upper conductive layer comprises a silicide of a conductive material of the first conductive layer.


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