The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 2024
Filed:
Dec. 31, 2018
Cadence Design Systems, Inc., San Jose, CA (US);
Piyush Pathak, Fremont, CA (US);
Haoyu Yang, Ma Liu Shui, HK;
Frank E. Gennari, Campbell, CA (US);
Ya-Chieh Lai, Mountain View, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Embodiments of the invention provide a system, media, and method for deep learning applications in physical design verification. Generally, the approach includes maintaining a pattern library for use in training machine learning model(s). The pattern library being generated adaptively and supplemented with new patterns after review of new patterns. In some embodiments, multiple types of information may be included in the pattern library, including validation data, and parameter and anchoring data used to generate the patterns. In some embodiments, the machine learning processes are combined with traditional design rule analysis. The patterns being generated and adapted using a lossless process that encodes the information of a corresponding area of a circuit layout.