The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2024

Filed:

Nov. 01, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Yang Lu, Boise, ID (US);

Kang-Yong Kim, Boise, ID (US);

Mark Kalei Hadrick, Boise, ID (US);

Keun Soo Song, Meridian, ID (US);

Assignee:

Micron Technologies, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/27 (2006.01); G06F 7/76 (2006.01); G06F 11/30 (2006.01); G06F 13/00 (2006.01); G06F 13/14 (2006.01); G06F 13/28 (2006.01); G06F 21/85 (2013.01);
U.S. Cl.
CPC ...
G06F 11/27 (2013.01); G06F 7/762 (2013.01); G06F 11/3041 (2013.01); G06F 13/00 (2013.01); G06F 13/14 (2013.01); G06F 13/28 (2013.01); G06F 21/85 (2013.01); G06F 2213/00 (2013.01); G06F 2213/0024 (2013.01);
Abstract

Apparatuses and techniques for implementing a data-transfer test mode are described. The data-transfer test mode refers to a mode in which the transfer of data from an interface die to a linked die can be tested prior to connecting the interface die to the linked die. In particular, the data-transfer test mode enables the interface die to perform aspects of a write operation and output a portion of write data that is intended for the linked die. With the data-transfer test mode, testing (or debugging) of the interface die can be performed during an earlier stage in the manufacturing process before integrating the interface die into an interconnected die architecture. For example, this type of testing can be performed at a wafer level or at a single-die-package (SDP) level. In general, the data-transfer test mode can be executed independent of whether the interface die is connected to the linked die.


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