The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2024
Filed:
Aug. 18, 2020
Csmc Technologies Fab2 Co., Ltd., Wuxi, CN;
Huajun Jin, Wuxi, CN;
Chunxu Li, Wuxi, CN;
CSMC TECHNOLOGIES FAB2 CO., LTD., Wuxi, CN;
Abstract
The present invention relates to an LDMOS device and a method for preparing same. When a field plate hole is formed by etching an interlayer dielectric layer, the etching of the field plate hole is stopped on a blocking layer by means of providing the blocking layer between a semiconductor base and the interlayer dielectric layer. Since the blocking layer is provided with at least one layer of an etch stop layer, and steps are formed on the surface of the blocking layer, at least two levels of formed hole field plates are distributed in a step shape, and lower ends of the first level of hole field plates to the nth level of hole field plates are gradually further away from the drift area in the direction from a gate structure to a drain area.