The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Mar. 22, 2022
Applicant:

Marvell Israel (M.i.s.l) Ltd., Yokne'am, IL;

Inventors:

Dan Azeroual, Kiriat Ata, IL;

Liav Ben Artsi, Nahariya, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H01L 23/66 (2006.01); H05K 3/40 (2006.01); H01L 23/50 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0222 (2013.01); H01L 23/50 (2013.01); H01L 23/66 (2013.01); H05K 1/0228 (2013.01); H05K 3/40 (2013.01); H01L 2223/6638 (2013.01);
Abstract

An integrated circuit package, including a circuit board, signal pins extending orthogonally to the circuit board surface, and grouped into a plurality of differential signal pin pairs, each signal pin pair positioned at a vertex of an array of orthogonal rows and columns, wherein each signal pin pair includes a positive and a negative signal pin. The plurality of signal pin pairs includes a first subset of signal pin pairs wherein the positive and the negative signal pins are arranged in an orientation along a line parallel to rows of the array and a second subset of signal pin pairs in which the positive and the negative signal pins are arranged in an orientation along a line parallel to columns of the array. For each signal pin pair in one of the first and second subsets, each nearest signal pin pairs belong to another of the first and second subsets.


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