The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2024
Filed:
Feb. 27, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Min Cao, Hsinchu, TW;
Pei-Yu Wang, Hsinchu, TW;
Sai-Hooi Yeong, Hsinchu County, TW;
Ching-Wei Tsai, Hsinchu, TW;
Kuan-Lun Cheng, Hsinchu, TW;
Chih-Hao Wang, Hsinchu County, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD, Hsinchu, TW;
Abstract
The present disclosure provides a method of forming a semiconductor device including an nFET structure and a pFET structure where each of the nFET and pFET structures include a semiconductor substrate and a gate trench. The method includes depositing an interfacial layer in each gate trench, depositing a first ferroelectric layer over the interfacial layer, removing the first ferroelectric layer from the nFET structure, depositing a metal oxide layer in each gate trench, depositing a second ferroelectric layer over the metal oxide layer, removing the second ferroelectric layer from the pFET structure, and depositing a gate electrode in each gate trench.