The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Mar. 18, 2021
Applicant:

Nexwafe Gmbh, Freiburg, DE;

Inventors:

Stefan Reber, Gundelfingen, DE;

Kai Schillinger, Freiburg, DE;

Frank Siebke, Merzhausen, DE;

Assignee:

NexWafe GmbH, Freiburg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/02 (2006.01); H01L 31/028 (2006.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02005 (2013.01); H01L 21/0262 (2013.01); H01L 21/02381 (2013.01); H01L 21/02532 (2013.01); H01L 21/02576 (2013.01); H01L 21/02579 (2013.01); H01L 31/028 (2013.01); H01L 31/1804 (2013.01);
Abstract

A silicon wafer for an electronic component, having an epitaxially grown silicon layer on a carrier substrate and the silicon layer is removed as a silicon wafer from the carrier substrate, in which at least one p-dopant and at least one n-dopant are introduced into the silicon layer during the epitaxial growth. The dopants are introduced into the silicon layer such that the silicon layer is formed having an electrically active p-doping and an electrically active n-doping, each greater than 1×10cm.


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