The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2024
Filed:
Jul. 01, 2022
Silicon Storage Technology, Inc., San Jose, CA (US);
Hieu Van Tran, San Jose, CA (US);
Thuan Vu, San Jose, CA (US);
Stephen Trinh, San Jose, CA (US);
Stanley Hong, San Jose, CA (US);
Anh Ly, San Jose, CA (US);
Steven Lemke, Boulder Creek, CA (US);
Vipin Tiwari, Dublin, CA (US);
Nhan Do, Saratoga, CA (US);
SILICON STORAGE TECHNOLOGY, INC., San Jose, CA (US);
Abstract
Numerous examples for performing tuning of a page or a word of non-volatile memory cells in an analog neural memory are disclosed. In one example, an analog neural memory system comprises an array of non-volatile memory cells arranged into rows and columns, each non-volatile memory cell comprising a word line terminal, a bit line terminal, and an erase gate terminal; a plurality of word lines, each word line coupled to word line terminals of a row of non-volatile memory cells; a plurality of bit lines, each bit line coupled to bit line terminals of a column of non-volatile memory cells; and a plurality of erase gate enable transistors, each erase gate enable transistor coupled to erase gate terminals of a word of non-volatile memory cells.