The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2024
Filed:
Oct. 07, 2020
Applicant:
Rambus Inc., San Jose, CA (US);
Inventors:
Frederick A. Ware, Los Altos Hills, CA (US);
Ely K. Tsern, Los Altos, CA (US);
Assignee:
Rambus Inc., San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 12/02 (2006.01); G06F 12/0804 (2016.01); G06F 12/08 (2016.01); G06F 12/0802 (2016.01); G06F 12/0891 (2016.01); G06F 12/1009 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0253 (2013.01); G06F 12/0246 (2013.01); G06F 12/08 (2013.01); G06F 12/0802 (2013.01); G06F 12/0804 (2013.01); G06F 12/0891 (2013.01); G06F 12/1009 (2013.01); G06F 2212/1036 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/60 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7205 (2013.01); G06F 2212/7211 (2013.01);
Abstract
A memory system includes nonvolatile physical memory, such as flash memory, that exhibits a wear mechanism asymmetrically associated with write operations. A relatively small cache of volatile memory reduces the number of writes, and wear-leveling memory access methods distribute writes evenly over the nonvolatile memory.