The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Dec. 22, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jaewon Hwang, Seongnam-si, KR;

Kwangjin Moon, Hwaseong-si, KR;

Hojin Lee, Hwaseong-si, KR;

Hyungjun Jeon, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/485 (2006.01); H01L 23/535 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/485 (2013.01); H01L 23/481 (2013.01); H01L 23/535 (2013.01); H01L 24/29 (2013.01); H01L 24/45 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate having a first surface adjacent to an active layer; a first insulating layer disposed on the first surface of the semiconductor substrate; a second insulating layer disposed on the first insulating layer; an etch stop structure interposed between the first insulating layer and the second insulating layer and including a plurality of etch stop layers; a contact wiring pattern disposed inside the second insulating layer and surrounded by at least one etch stop layer of the plurality of etch stop layers; and a through electrode structure configured to pass through the semiconductor substrate, the first insulating layer, and at least one etch stop layer of the plurality of etch stop layers in a vertical direction and contact the contact wiring pattern.


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