The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Apr. 26, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Liang Yu, Boise, ID (US);

Jonathan S. Parry, Boise, ID (US);

Xiaojiang Guo, San Jose, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G11C 16/32 (2006.01); G06F 1/3206 (2019.01); G11C 7/22 (2006.01); G11C 7/10 (2006.01); G06F 1/3215 (2019.01); G11C 16/30 (2006.01); G11C 5/14 (2006.01); G11C 16/04 (2006.01); H01L 25/065 (2023.01); G06F 119/06 (2020.01);
U.S. Cl.
CPC ...
G06F 3/0625 (2013.01); G06F 1/3206 (2013.01); G06F 1/3215 (2013.01); G06F 3/0631 (2013.01); G06F 3/0683 (2013.01); G11C 5/14 (2013.01); G11C 7/1045 (2013.01); G11C 7/22 (2013.01); G11C 16/30 (2013.01); G11C 16/32 (2013.01); G06F 2119/06 (2020.01); G11C 16/0483 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06562 (2013.01);
Abstract

Memory device might include a controller configured to cause the memory device to determine whether the memory device is waiting to initiate a next phase of an access operation, and in response to determining that the memory device is waiting to initiate the next phase, determine whether there is sufficient available current budget to initiate the next phase in a selected operating mode in response to at least the priority token of the memory device, an expected peak current magnitude for the next phase in the selected operating mode, and additional expected peak current magnitudes for other memory devices. In response to determining that there is sufficient available current budget to initiate the next phase in the selected operating mode, the memory device might output the expected peak current magnitude for the next phase in the selected operating mode from the memory device.


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