The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Jun. 24, 2022
Applicant:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Inventors:

Hye-Hyeon Byeon, Icheon-si Gyeonggi-do, KR;

Sang-Deok Kim, Seongnam-si Gyeonggi-do, KR;

Il-Young Kwon, Seoul, KR;

Tae-Hong Gwon, Icheon-si Gyeonggi-do, KR;

Jin-Ho Bin, Hanam-si Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Icheon-si Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/02178 (2013.01); H01L 21/02315 (2013.01); H01L 21/02636 (2013.01); H01L 21/31116 (2013.01); H01L 29/40117 (2019.08); H01L 29/66833 (2013.01);
Abstract

A vertical semiconductor device and a method for fabricating the same may include forming an alternating stack of dielectric layers and sacrificial layers over a lower structure, forming an opening by etching the alternating stack, forming a non-conformal blocking layer on the alternating stack in which the opening is formed, adsorbing a deposition inhibitor on a surface of the blocking layer to convert the non-conformal blocking layer into a conformal blocking layer on which the deposition inhibitor is adsorbed, and forming a charge storage layer on the conformal blocking layer.


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