The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Aug. 12, 2021
Applicant:

Toyota Jidosha Kabushiki Kaisha, Toyota, JP;

Inventors:

Keiji Kuroda, Toyota, JP;

Rentaro Mori, Kasugai, JP;

Hiroshi Yanagimoto, Miyoshi, JP;

Haruki Kondoh, Okazaki, JP;

Kazuaki Okamoto, Toyota, JP;

Akira Kato, Toyota, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C25D 3/38 (2006.01); H05K 3/24 (2006.01); C25D 17/00 (2006.01);
U.S. Cl.
CPC ...
H05K 3/242 (2013.01); C25D 3/38 (2013.01); C25D 17/002 (2013.01); C25D 17/005 (2013.01); H05K 2203/0723 (2013.01);
Abstract

A method for manufacturing a wiring board in which the adhesion between an underlayer and a seed layer is improved. A diffusion layer in which an element forming the underlayer and an element forming a coating layer are mutually diffused is formed between the underlayer and a wiring portion of the coating layer by irradiating the wiring portion with a laser beam. A seed layer is formed by removing a portion excluding the wiring portion of the coating layer from the underlayer. A metal layer is formed by disposing a solid electrolyte membrane between an anode and the seed layer and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from an insulating substrate.


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