The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Dec. 23, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Daniel Gruber, St. Andrae, AT;

Kameran Azadet, San Ramon, CA (US);

Yu-Shan Wang, Hillsboro, OR (US);

Hundo Shin, Santa Clara, CA (US);

Martin Clara, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/04 (2006.01); H03M 1/06 (2006.01); H04B 1/10 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0614 (2013.01); H04B 1/0475 (2013.01); H04B 1/1018 (2013.01);
Abstract

A Digital-to-Analog Converter, DAC, is provided. The DAC comprises one or more first DAC cells configured to generate a first analog signal based on first digital data. The one or more first DAC cells are coupled to a first output node for coupling to a first load. The DAC comprises one or more second DAC cells configured to generate a second analog signal based on second digital data. The one or more second DAC cells are coupled to a second output node for coupling to a second load. The one or more first DAC cells and the one or more second DAC cells are couplable to a power supply for drawing a supply current. The DAC further comprises a data generation circuit configured to generate the second digital data based on the first digital data.


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