The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2024
Filed:
Aug. 18, 2021
Applicant:
Rambus Inc., San Jose, CA (US);
Inventors:
Panduka Wijetunga, Thousand Oaks, CA (US);
Abhishek Desai, Newbury Park, CA (US);
Assignee:
RAMBUS INC., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4076 (2006.01); G06F 1/06 (2006.01); H03K 3/017 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G06F 1/06 (2013.01); H03K 3/017 (2013.01);
Abstract
A clocking architecture for a memory module is configurable to independently select either rising or falling edges of an input clock as respective references for generation of an internal clock and an output clock. The clocking architecture supports reference edge selection in both a single data rate (SDR) mode and a double data rate (DDR) mode while maintaining a fixed phase relationship between the input clock and the output clock regardless of the reference edge selection.