The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2024
Filed:
Sep. 18, 2021
Changxin Memory Technologies, Inc., Hefei, CN;
CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;
Abstract
A simulation method and device, a power wire topology network, and a test circuit involve: a power wire topology network is generated according to a power wire layout, the power wire topology network including a plurality of first layer of metal wires arranged in a transverse direction, a plurality of second layer of metal wires arranged in a longitudinal direction, power child nodes and a parasitic element, the parasitic element being located between the two power child nodes; a minimum voltage of the power input node of each circuit nodule in a circuit corresponding to the power wire topology network is determined, the power input node being one of the power child nodes in each circuit module; and a time sequence simulation is performed according to the minimum voltage of the power input node of each circuit module and the post-simulation circuit network list of an integrated circuit.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile