The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2024

Filed:

Sep. 22, 2021
Applicant:

Wolfspeed, Inc., Durham, NC (US);

Inventors:

Daniel Jenner Lichtenwalner, Raleigh, NC (US);

Sei-Hyung Ryu, Cary, NC (US);

Arman Ur Rashid, Durham, NC (US);

Assignee:

Wolfspeed, Inc., Durham, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/808 (2006.01); H01L 29/861 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7802 (2013.01); H01L 29/66712 (2013.01); H01L 29/8083 (2013.01); H01L 29/861 (2013.01);
Abstract

A precursor for a vertical semiconductor device is provided with a substrate, a drift region over the substrate, and an upper precursor region over the drift region. The top surface of the precursor is substantially planar, and the substrate and the drift region are doped with a first dopant of a first polarity. In a first embodiment, a series of implants with a second dopant is provided in the upper precursor region via the top surface to form each of at least two gate regions such that each implant of the series of implants is provided at a different depth below the top surface. In a second embodiment, a series of implants with the first dopant is provided in the upper precursor region via the top surface to form a channel region that has at least a portion between two gate regions.


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