The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2024

Filed:

Jan. 17, 2022
Applicant:

Infineon Technologies Dresden Gmbh & Co. KG, Dresden, DE;

Inventors:

Erich Griebl, Dorfen, DE;

Markus Beninger-Bina, Grosshelfendorf, DE;

Matteo Dainese, Munich, DE;

Ingo Dirnstorfer, Dresden, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 21/265 (2006.01); H01L 21/306 (2006.01); H01L 21/266 (2006.01); H01L 29/417 (2006.01); H01L 29/10 (2006.01); H01L 21/308 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 21/324 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/308 (2013.01); H01L 21/30604 (2013.01); H01L 21/324 (2013.01); H01L 29/0865 (2013.01); H01L 29/0869 (2013.01); H01L 29/1095 (2013.01); H01L 29/41741 (2013.01); H01L 29/6634 (2013.01); H01L 29/66727 (2013.01); H01L 29/7397 (2013.01); H01L 29/7811 (2013.01);
Abstract

A power semiconductor device includes: a semiconductor body; a control electrode at least partially on or inside the semiconductor body; elevated source regions in the semiconductor body adjacent to the control electrode; recessed body regions adjacent to the elevated source regions; and a dielectric layer arranged on a portion of a surface of the semiconductor body and defining a contact hole. The contact hole is at least partially filled with a conductive material establishing an electrical contact with at least a portion of the elevated source regions and at least a portion of the recessed body regions. At least one first contact surface between at least one elevated source region and the dielectric layer extends in a first horizontal plane. At least one second contact surface between at least one recessed body region and the dielectric layer extends in a second horizontal plane located vertically below the first horizontal plane.


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