Dynamic prioritization of system-on-chip interconnect traffic using information from an operating system and hardware

Abstract

Embodiments of apparatuses and methods for dynamic prioritization of interconnect traffic in a system-on-chip are described. In an embodiment, an apparatus includes first circuitry to use a first weight value to weight operating system priority information to generate a first weighted priority value, second circuitry to use a second weight value to weight system-on-chip (SoC) hardware priority information to generate a second weighted priority value, third circuitry to sum the first weighted priority value and the second weighted priority value to generate a quality of service (QoS) value for an SoC interconnect transaction, and an arbiter to use the QoS value to prioritize the SoC interconnect transaction on an SoC interconnect.