The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2024

Filed:

Aug. 09, 2022
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Jonathan Y. Tong, Austin, TX (US);

David E. Kroesche, Austin, TX (US);

Brett S. Feero, Lake Oswego, OR (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/0802 (2016.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0802 (2013.01); G06F 3/0604 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 2212/60 (2013.01);
Abstract

A processor configured for real-time transaction processing is disclosed. A processor circuit includes configuration registers that designate a first range of physical memory addresses as reserved for real-time memory requests and a second, non-overlapping range of physical memory addresses that are shared between real-time and non-real-time memory requests. In response to determining that a memory request is associated with an address in the first range, the processor tags the request as a real-time request. The configuration registers may also store information designating portions of one or more cache memories and one or more buffers as being reserved for real-time memory requests. During arbitration, real-time memory requests are given priority over older, non-real-time memory requests.


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