The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2024
Filed:
Oct. 18, 2022
Nxp B.v., Eindhoven, NL;
Antonius Hendrikus Jozef Kamphuis, Lent, NL;
Guido Albermann, Hamburg, DE;
Johannes Cobussen, Beuningen, NL;
NXP B.V., Eindhoven, NL;
Abstract
A technique for handling an integrated circuit/tape assembly having a plurality of integrated circuits supported by underlying dicing tape involves placing the integrated circuit/tape assembly on a bottom file frame carrier (FFC) frame having structure (e.g., an inner rim or flexible pegs), placing a top FFC frame having a central opening over the integrated circuit/tape assembly, and mating the top and bottom FFC frames such that the dicing tape is pulled over the structure thereby laterally stretching the dicing tape, which breaks wafer saw bows holding the integrated circuits together. The lateral stretching of the dicing tape increases distance between adjacent integrated circuits in at least two mutually orthogonal lateral directions, thereby inhibiting the adjacent integrated circuits from colliding during shipment or storage for subsequent processing. The resulting assembly can be thinner than conventional FFC configurations, which results in more efficient shipment and storage.