The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2024

Filed:

May. 03, 2022
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Gordon M. Grivna, Mesa, AZ (US);

Stephen St. Germain, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/48 (2006.01); H01L 21/78 (2006.01); H01L 23/14 (2006.01); H01L 23/15 (2006.01); H01L 23/495 (2006.01); H01L 23/498 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02381 (2013.01); H01L 21/0254 (2013.01); H01L 21/4825 (2013.01); H01L 21/78 (2013.01); H01L 23/145 (2013.01); H01L 23/15 (2013.01); H01L 23/49562 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/49844 (2013.01); H01L 29/2003 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/49171 (2013.01);
Abstract

A first semiconductor substrate contains a first semiconductor material, such as silicon. A second semiconductor substrate containing a second semiconductor material, such as gallium nitride or aluminum gallium nitride, is formed on the first semiconductor substrate. The first semiconductor substrate and second semiconductor substrate are singulated to provide a semiconductor die including a portion of the second semiconductor material supported by a portion of the first semiconductor material. The semiconductor die is disposed over a die attach area of an interconnect structure. The interconnect structure has a conductive layer and optional active region. An underfill material is deposited between the semiconductor die and die attach area of the interconnect structure. The first semiconductor material is removed from the semiconductor die and the interconnect structure is singulated to separate the semiconductor die. The first semiconductor material can be removed post interconnect structure singulation.


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