The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2024

Filed:

Dec. 07, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Rajesh Poornachandran, Portland, OR (US);

Marcos Carranza, Portland, OR (US);

Kshitij Arun Doshi, Tempe, AZ (US);

Francesc Guim Bernat, Barcelona, ES;

Karthik Kumar, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2025 (2013.01); G06F 11/2028 (2013.01); G06F 2201/85 (2013.01);
Abstract

Embodiments described herein are generally directed to intelligent management of microservices failover. In an example, responsive to an uncorrectable hardware error associated with a processing resource of a platform on which a task of a service is being performed by a primary microservice, a failover trigger is received by a failover service. A secondary microservice is identified by the failover service that is operating in lockstep mode with the primary microservice. The secondary microservice is caused by the failover service to takeover performance of the task in non-lockstep mode based on failover metadata persisted by the primary microservice. The primary microservice is caused by the failover service to be taken offline.


Find Patent Forward Citations

Loading…