The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2024

Filed:

Sep. 08, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Juntao Li, Cohoes, NY (US);

Kangguo Cheng, Schenectady, NY (US);

Dexin Kong, Redmond, WA (US);

Zheng Xu, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10N 70/00 (2023.01);
U.S. Cl.
CPC ...
H10N 70/063 (2023.02); H10N 70/826 (2023.02); H10N 70/8833 (2023.02); H10N 70/021 (2023.02);
Abstract

Methods of forming a settable resistance device, settable resistance devices, and neuromorphic computing devices include isotropically etching a stack of layers, the stack of layers having an insulator layer in contact with a conductor layer, to selectively form divots in exposed sidewalls of the conductor layer. The stack of layers is isotropically etched to selectively form divots in exposed sidewalls of the insulator layer, thereby forming a tip at an interface between the insulator layer and the conductor layer. A dielectric layer is formed over the stack of layers to cover the tip. An electrode is formed over the dielectric layer, such that the dielectric layer is between the electrode and the tip.


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