The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Dec. 15, 2020
Applicant:

Teradyne, Inc., North Reading, MA (US);

Inventors:

Frank Parrish, North Reading, MA (US);

Diwakar Saxena, North Reading, MA (US);

Michael Herzog, North Reading, MA (US);

Edward Dague, North Reading, MA (US);

Michael F. Halblander, North Reading, MA (US);

Assignee:

TERADYNE, INC., North Reading, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 13/6587 (2011.01); H01R 12/51 (2011.01); H01R 13/24 (2006.01);
U.S. Cl.
CPC ...
H01R 13/6587 (2013.01); H01R 12/515 (2013.01); H01R 13/2428 (2013.01); H01R 2201/20 (2013.01);
Abstract

An interposer for a test system includes coaxial cables, each of which is configured to transport a first portion of current originating from a current source, and printed circuit boards (PCBs), each of which is connected to a set of the coaxial cables in order to receive the first portion of the current from each coaxial cable in the set and to transport a second portion of the current. A spring leaf assembly includes spring leaves, each of which is connected to a PCB in order to transport a third portion of the current obtained from the PCB to a device interface board (DIB) that connects to devices under test (DUTs) to be tested by the test system. The coaxial cables on each PCB are arranged in parallel, the PCBs are arranged in parallel, and the spring leaves on each PCB are arranged in parallel.


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