The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Jun. 03, 2021
Applicants:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Tsmc Nanjing Company, Limited, Jiangsu, CN;

Inventors:

Huaixin Xian, Hsinchu, TW;

Yang Zhou, Hsinchu, TW;

Qingchao Meng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); G06F 30/392 (2020.01); H01L 23/528 (2006.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); G06F 30/392 (2020.01); H01L 21/823871 (2013.01); H01L 23/5286 (2013.01); H01L 27/092 (2013.01); G06F 2119/12 (2020.01);
Abstract

An integrated circuit (IC) device includes at least one delay circuit having an input and an output, and an output connector electrically coupled to the output. The delay circuit further includes a plurality of transistors electrically coupled with each other between the input and the output. The plurality of transistors is configured to delay an input signal received at the input to generate a delayed signal at the output. The output is in a first metal layer. The output connector includes a first conductive pattern in the first metal layer, and a second conductive pattern in a second metal layer different from the first metal layer. The second conductive pattern electrically couples the output to the first conductive pattern.


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