The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Aug. 04, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Martin Jared Barclay, Middleton, ID (US);

Mark Tunik, Portland, OR (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/535 (2006.01); H01L 21/768 (2006.01); H10B 20/00 (2023.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/50 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/50 (2023.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/7684 (2013.01); H01L 21/76895 (2013.01); H01L 23/535 (2013.01); H10B 20/00 (2023.02); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/50 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/50 (2023.02);
Abstract

Disclosed is a three-dimensional memory device. In one embodiment, a device is disclosed comprising a source plate; plugs fabricated fabricated on or partially formed in the source plate; a stack formed on the substrate and plugs comprising alternating insulating layers and conductive layers and channel-material strings of memory cells extending through the insulating layers and conductive layers; a first set of pillars extending through the stack formed by a process including etching the alternating insulating layers and conductive layers and depositing a pillar material therein, wherein each pillar in the first set of pillars terminates atop a respective plug in the plurality of plugs; and a second set of pillars extending through the stack formed by a process including etching the alternating insulating layers and conductive layers and depositing a pillar material therein, wherein each pillar in the second set of pillars terminates in the source plate.


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