The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2024
Filed:
Sep. 28, 2022
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Matthew B. Leslie, Boise, ID (US);
Timothy M. Hollis, Boise, ID (US);
Roy E. Greeff, Boise, ID (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/18 (2006.01); G11C 7/10 (2006.01); G11C 8/06 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 8/18 (2013.01); G11C 7/1063 (2013.01); G11C 7/222 (2013.01); G11C 8/06 (2013.01);
Abstract
A memory subsystem architecture that includes clock signal routing architecture to split a clock signal to support two register clock driver (RCD) devices. The clock signal routing architecture may include clock signal splitter circuit that enables contemporaneous provision of a common clock signal to the two register clock driver devices. The clock signal splitter circuit may have three legs: a first leg to receive the clock signal from an external bus, and two similar legs to route the clock signal to the RCD devices.