The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2024
Filed:
Dec. 19, 2021
Applicant:
Ceremorphic, Inc., San Jose, CA (US);
Inventors:
Neelam Surana, Palaj, IN;
Robert F. Wiser, Santa Cruz, CA (US);
Assignee:
Ceremorphic, Inc., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01); G11C 7/12 (2006.01); H03K 19/20 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 7/062 (2013.01); G11C 7/1069 (2013.01); G11C 7/1096 (2013.01); G11C 7/12 (2013.01); H03K 19/20 (2013.01);
Abstract
A memory performing logic functions has two single transistor static ram memory (STSRAM) with drain, source, and gate terminal which can be written, read, and when read, generates an output current. The STSRAMs have drain and source connected in parallel, and when read, generate a current provided to a current comparator amplifier (CCA) which is compared to a reference current Ito generate an output which is at least one of a logical AND, logical NAND, logical OR, logical NOR, or logical exclusive OR (XOR).