The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Oct. 03, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Sheng-Hsiung Chen, Zhubei, TW;

Huang-Yu Chen, Hsinchu, TW;

Chung-Hsing Wang, Hsinchu, TW;

Jerry Chang Jui Kao, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/00 (2020.01); G06F 30/3947 (2020.01); G06F 30/39 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3947 (2020.01); G06F 30/39 (2020.01);
Abstract

The routing of conductors in the conductor layers in an integrated circuit are routed using mixed-Manhattan-diagonal routing. Various techniques are disclosed for selecting a conductor scheme for the integrated circuit prior to fabrication of the integrated circuit. Techniques are also disclosed for determining the supply and/or the demand for the edges in the mixed-Manhattan-diagonal routing.


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Chen, Sheng-Hsiung. (2024). Conductor scheme selection and track planning for mixed-diagonal-manhattan routing (U.S. Patent No. 11861284). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11861284

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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