The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Jul. 07, 2020
Applicant:

Cryptography Research, Inc, San Jose, CA (US);

Inventors:

Andrew John Leiserson, San Francisco, CA (US);

Mark Evan Marson, Carlsbad, CA (US);

Assignee:

Rambus Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); G06F 21/75 (2013.01); G06F 21/78 (2013.01); H04L 9/00 (2022.01); G09C 1/00 (2006.01); H04L 9/06 (2006.01);
U.S. Cl.
CPC ...
G06F 21/755 (2017.08); G06F 21/78 (2013.01); G09C 1/00 (2013.01); H04L 9/003 (2013.01); H04L 9/0618 (2013.01); H04L 2209/08 (2013.01);
Abstract

A cryptographic accelerator (processor) retrieves data blocks for processing from a memory. These data blocks arrive and are stored in an input buffer in the order they were stored in memory (or other known order)—typically sequentially according to memory address (i.e., in-order.) The processor waits until a certain number of data blocks are available in the input buffer and then randomly selects blocks from the input buffer for processing. This randomizes the processing order of the data blocks. The processing order of data blocks may be randomized within sets of data blocks associated with a single read transaction, or across sets of data blocks associated with multiple read transactions.


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