The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Oct. 27, 2021
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Tien-Chang Chang, Hsinchu, TW;

Yan-Liang Ji, Hsinchu, TW;

Assignee:

MEDIATEK INC., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 24/06 (2013.01); H01L 24/73 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/73104 (2013.01);
Abstract

A semiconductor device includes a semiconductor die having an active surface, an opposite surface, a vertical sidewall extending between the active surface and the opposite surface, and input/output (I/O) connections disposed on the active surface. A redistribution layer (RDL) is disposed on the active surface of the semiconductor die. A plurality of first connecting elements is disposed on the RDL. A molding compound encapsulates the opposite surface and the vertical sidewall of the semiconductor die. The molding compound also covers the RDL and surrounds the plurality of first connecting elements. An interconnect substrate is mounted on the plurality of first connecting elements and on the molding compound.


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