The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Jul. 23, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chang-Jen Chen, Hsinchu County, TW;

Wen-Yun Wang, Taipei, TW;

Yen-Chun Chen, Hsinchu, TW;

Po-Ting Yeh, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/68 (2006.01); H01L 23/544 (2006.01); G01N 21/95 (2006.01); G03F 9/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/681 (2013.01); G01N 21/9501 (2013.01); G03F 9/7023 (2013.01); G03F 9/7046 (2013.01); G03F 9/7049 (2013.01); G03F 9/7088 (2013.01); G03F 9/7092 (2013.01); H01L 23/544 (2013.01);
Abstract

A method for calibrating the alignment of a wafer is provided. A plurality of alignment position deviation (APD) simulation results are obtained form a plurality of mark profiles. An alignment analysis is performed on a mark region of the wafer with a light beam. A measured APD of the mark region of the wafer is obtained in response to the light beam. The measured APD is compared with the APD simulation results to obtain alignment calibration data. An exposure process is performed on the wafer with a mask according to the alignment calibration data.


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