The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Apr. 14, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Siman Li, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1009 (2013.01); G11C 7/109 (2013.01); G11C 7/1039 (2013.01); G11C 7/1063 (2013.01); G11C 7/1066 (2013.01); G11C 7/1093 (2013.01); H03K 19/20 (2013.01);
Abstract

A signal masking circuit includes a receiving circuit, a delay control circuit, and a logical operation circuit. The receiving circuit is configured to: receive a signal to be processed and a chip select (CS) signal, and output an initial processing signal and an initial CS signal. The delay control circuit is configured to perform delay and logical control operations on the initial CS signal to obtain a CS masking signal, where a pulse width of the CS masking signal is greater than or equal to two preset clock periods. The logical operation circuit is configured to perform invalid masking on the initial processing signal according to the CS masking signal to obtain a target signal.


Find Patent Forward Citations

Li, Siman. (2023). Signal masking circuit and semiconductor memory (U.S. Patent No. 11854653). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11854653

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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