The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Feb. 03, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sang-Yeop Baeck, Hwaseong-si, KR;

Tae-Hyung Kim, Hwaseong-si, KR;

Daeyoung Moon, Yongin-si, KR;

Dong-Wook Seo, Hwaseong-si, KR;

Inhak Lee, Daegu, KR;

Hyunsu Choi, Suwon-si, KR;

Taejoong Song, Seongnam-si, KR;

Jae-Seung Choi, Hwaseong-si, KR;

Jung-Myung Kang, Suwon-si, KR;

Hoon Kim, Goyang-si, KR;

Jisu Yu, Seoul, KR;

Sun-Yung Jang, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/419 (2006.01); H10B 10/00 (2023.01); G11C 7/08 (2006.01); H01L 23/528 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 7/08 (2013.01); H01L 23/5286 (2013.01); H01L 27/092 (2013.01); H10B 10/12 (2023.02); H10B 10/18 (2023.02);
Abstract

A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.


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